Reelay is a header-only C++ library and set of tools for system-level verification and testing of real-time systems. Reelay implements state-of-the-art runtime verification techniques to construct runtime monitors that check temporal behaviors of the system against system-level requirements. Hence, Reelay can be used to enhance rigorous systems engineering practices by formalizing and automating the assessment phase.
- Formal specification of temporal properties
- Provably correct monitor construction from the specification
- Fast and frugal runtime requirement checking (very low overhead)
- Simple but non-restrictive user interface
- Available for C++ and Python
Reelay reads executable specifications written in plain text and verifies that the system does what those specifications say at runtime. In order to construct runtime monitors automatically, those specifications must follow some basic syntax rules, called Reelay Expression (Rye) format. See the reference for the Rye format for more details.
Currently Reelay does not have a contribution guideline. However, we always welcome bug reports, enhancements, and comments regarding the project. Please use the Issues page if you have a bug report, enhancement, or comment.
If you are using Reelay in an academic work, please cite
where the main technique has been explained throughtly. Further bits of techniques and motivations can be traced in the following papers.
- First-order temporal logic monitoring with BDDs
- Sequential circuits from regular expressions revisited
Please also look at the performance notes if you compare the performance between tools.